Error (10818): Can't infer register for "HOUR10[0]" at shizhong.vhd(21) because it does not hold its value outside the clock edge
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
--------------------------------------------------------------------
entity shizhong is
port( Clk : in std_logic; --时钟输入
Rst : in std_logic; --复位输入
Disp_Temp :out std_logic_vector(3 downto 0)
);
end shizhong;
--------------------------------------------------------------------
architecture behave of shizhong is
signal SEG_SEL:std_logic_vector(2 downto 0);
signal SEC1,SEC10 : std_logic_vector(3 downto 0);
signal MIN1,MIN10 : std_logic_vector(3 downto 0);
signal HOUR1,HOUR10 : std_logic_vector(3 downto 0);
begin
process(Rst,clk) 这里错误because it does not hold its value outside the clock edge
begin
if Rst='0' then
SEC1<="0000";
SEC10<="0000";
MIN1<="0000";
MIN10<="0000";
HOUR1<="0000";
HOUR10<="0000";
elsif(Clk'event and Clk='1') then --正常运行
if(HOUR1="01001")then
HOUR1<="0000";
HOUR10<=HOUR10+1;
elsif(HOUR10="0010" and HOUR1= "0011") then
HOUR1<="0000";
HOUR10<="0000";
else
HOUR1<=HOUR1+1;
end if;
if(MIN1="1001") then
MIN1<="0000";
if(MIN10="0101") then
MIN10<="0000";
else
MIN10<=MIN10+1;
end if;
else
MIN1<=MIN1+1;
end if;
elsif(SEC1=9) then
SEC1<="0000";
if(SEC10="0101") then
SEC10<="0000";
if(MIN1="1001") then
MIN1<="0000";
if(MIN10="0101") then
MIN10<="0000";
if(HOUR1="1001") then
HOUR1<="0000";
HOUR10<=HOUR10+1;
elsif(HOUR10="0000" and HOUR1="0011") then
HOUR1<="0000";
HOUR10<="0000";
else
HOUR1<=HOUR1+1;
end if;
else
MIN10<=MIN10+1;
end if;
else
MIN1<=MIN1+1;
end if;
else
SEC10<=SEC10+1;
end if;
else
SEC1<=SEC1+1;
end if;
end process;
process(Clk)
begin
if Clk'event and Clk='1' then
SEG_SEL<=SEG_SEL+1;
end if;
end process;
process(SEG_SEL)
begin
case (SEG_SEL) is
when "000"=>Disp_Temp<=HOUR10;
when "001"=>Disp_Temp<=HOUR1;
when "010"=>Disp_Temp<="1010";
when "011"=>Disp_Temp<=MIN10;
when "100"=>Disp_Temp<=MIN1;
when "101"=>Disp_Temp<="1010";
when "110"=>Disp_Temp<=SEC10;
when "111"=>Disp_Temp<=SEC1;
end case;
end process;
end behave;