MIPI转双路LVDS。集睿智远CS5518，集创北方ICN6202，国腾GM8775，东芝TC358775。PIN对PIN。国产对标，性价比高。 LVDS和MIPi的区别：LVDS输出接口利用即低压差分信号传输。采用其输出接口，可以使得信号在差分PCB线或平衡电缆上传输，由于采用低压和低电流驱动方式，因此，实现了低噪声和低功耗。LVDS 输出接口液晶显示器。 MIPI信号是成对传输的，主要是为了减少干扰，MIPI信号成对走线，两根线从波形看是成反相，所以有外部干扰过来，就会被抵消很大部分。1. Exhibit LVDS Tx block operates at 1.8V @135 MHz to reduceoperation power2. Update 4-lane DSI Rx max bit rate @ 1 Gbps/lane to support1920×1200×24 @60fps3. Add STBY pin with to enable turning on VDDIO power first beforeother power 网页链接 primary function of this chip is DSI-to-LVDS Bridge, enablingvideo streaming output over DSI link to drive LVDS-compatibledisplay panels. The chip supports up to 1600×1200 24-bit pixel resolution for single-link LVDS and up toWUXGA (1920×1200 24-bit pixels) resolution for dual-link LVDS. As a secondary function, the chip alsosupports an I2C Master which is controlled by the DSI link; this may be used as an interface to any othercontrol functions through I2C.● Clock Source² LVDS pixel clock source is either from externalclock EXTCLK or derived from DSICLK.² A built-in PLL generates the high-speed LVDSserializing clock requiring no external components● Digital Input/Output Signals² All Digital Input signals are 3.3V tolerant² All Digital Output signals can output ranging from1.8V to 3.3V depending on IO supply voltage● Power supply² MIPI DSI D-PHY: 1.2 V² LVDS PHY:1.8 V² I/O:1.8 V - 3.3V (all IO supply pins mustbe same level)² Digital Core: 1.2 V● Power Consumption² Power Down State is achieved by:1. Reset asserted2. EXTCLK not toggling3. STBY=04. DSI in ULPS Drive 更多详细资料,可以私信留言，合作共赢，共创辉煌，互相学习共同进步，用芯成就专业，专业承载重托。[图片]